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8086 Micro Processor

8086 Microprocessor is an enhanced version of 8085Microprocessor that was designed by Intel in 1976. It is a 16-bit Microprocessor having 20 address lines and16 data lines. 16-bit processor means that its ALU and internal registers work with 16 bit binary word so it can read/write 16 or 8 bit data at a time to a memory/port. The address bus of 8086 microprocessor has a 20 bits address bus. Thus it can access upto 220 = 1M Byte size of RAM directly. It consists of powerful instruction set, which provides operations like multiplication and division easily. Frequency range of 8086 is 6-10 MHz.
It supports two modes of operation, i.e. Maximum mode and Minimum mode. Maximum mode is suitable for system having multiple processors and Minimum mode is suitable for system having a single processor.
Features of 8086
The most prominent features of a 8086 microprocessor are as follows −
• It has an instruction queue, which is capable of storing six instruction bytes from the memory resulting in faster processing.
• It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data bus, and 16-bit external data bus resulting in faster processing.
• It is available in 3 versions based on the frequency of operation −
o 8086 → 5MHz
o 8086-2 → 8MHz
o (c)8086-1 → 10 MHz
• It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which improves performance.
• Fetch stage can prefetch up to 6 bytes of instructions and stores them in the queue.
• Execute stage executes these instructions.
• It has 256 vectored interrupts.
• It consists of 29,000 transistors.
Comparison between 8085 & 8086 Microprocessor
• Size − 8085 is 8-bit microprocessor, whereas 8086 is 16-bit microprocessor.
• Address Bus − 8085 has 16-bit address bus while 8086 has 20-bit address bus.
• Memory − 8085 can access up to 64Kb, whereas 8086 can access up to 1 Mb of memory.
• Instruction − 8085 doesn’t have an instruction queue, whereas 8086 has an instruction queue.
• Pipelining − 8085 doesn’t support a pipelined architecture while 8086 supports a pipelined architecture.
• I/O − 8085 can address 2^8 = 256 I/O's, whereas 8086 can access 2^16 = 65,536 I/O's.
• Cost − The cost of 8085 is low whereas that of 8086 is high.
8088 Microprocessor
It is also a 16-bit microprocessor. In 8088, data bus is 8 bits as compared to 16-bits data bus in 8086. The instruction queue of 8088 is 4 bytes long as compared to 6 bytes instruction queue of 8086. EU is same for both 8086 & 8088. Register set & instruction set of both processors are also identical.
Comparison between 8086 & 8088 Microprocessor
• Data bus: In 8088, the BIU data bus path is 8 bits wide whereas in 8086 BIU data bus path is 16 bits.
• Instruction Queue: In 8088 instruction queue is four bytes long where as in 8086 it is 6 bytes long.
Architecture of 8086
Figure below is a model of 8086 CPU. 8086 Microprocessor is divided into two independent functional units, i.e., EU (Execution Unit) and BIU (Bus Interface Unit). The word independent implies that these two units can function parallel to each other. In other words they may be considered as two stages of the instruction pipeline.
The BIU provides hardware functions, including generation of the memory and I/O addresses for the transfer of data between the outside world and the CPU.
The EU receives program instruction codes and data from BIU, executes these instructions, and stores the results in the general registers. By passing the data back to the BIU, data can also be stored in a stored memory location or written to an output device. Note that the EU has connection to the system buses. It receives and outputs all its data through BIU.

BIU (Bus Interface Unit)
The BIU (Bus Interface Unit) primarily interacts with the system bus. It performs almost all the activities relating to fetch cycle such as:
• Calculating the physical address of the next instruction
• Fetching the instruction
• Reading or writing data memory or 110 port from memory or Input/Output.
The instruction/data is then passed to the execution unit. BIU takes care of all data and addresses transfers on the buses for the EU like sending addresses, fetching instructions from the memory, reading data from the ports and the memory as well as writing data to the ports and the memory. EU has no direction connection with System Buses so this is possible with the BIU. EU and BIU are connected with the Internal Bus.
It has the following functional parts −
(a) The Instruction Queue
BIU contains the instruction queue. BIU gets up to 6 bytes of next instructions and stores them in the instruction queue. When EU executes instructions and is ready for its next instruction, then it simply reads the instruction from this instruction queue resulting in increased execution speed. The instruction queue is used to store the instruction "bytes" fetched. Please note two points here: that it is (1) A Byte (2) Queue. This is used to store information in byte form, with the underlying queue data structure. The advantage of this queue would only be if the next expected instructions are fetched in advance, thus, allowing a pipeline of fetch and execute cycles. Fetching the next instruction while the current instruction executes is called pipelining.
(b) Segment register – The segment registers are used to calculate the address of memory location along with other registers. A segment register is 16 bits long. The BIU contains four sixteen-bit registers, i.e. the CS: Code Segment, the DS: Data Segment, the SS: Stack Segment, and the ES: Extra Segment. But what is the need of the segments: Segments logically divide a program into logical entities of Code, Data and Stack each having a specific size of 64 K. The segment register holds the upper 16 bits of the starting address of a logical group of memory, called the segment.
It holds the addresses of instructions and data in memory, which are used by the processor to access memory locations. It also contains 1 pointer register IP, which holds the address of the next instruction to be executed by the EU.
CS − It stands for Code Segment. It is used for addressing a memory location in the code segment of the memory, where the executable program is stored.
DS − It stands for Data Segment. It consists of data used by the program andis accessed in the data segment by an offset address or the content of other register that holds the offset address.
SS − It stands for Stack Segment. It handles memory to store data and addresses during execution.
ES − It stands for Extra Segment. ES is additional data segment, which is used by the string to hold the extra destination data.

(b) Instruction pointer − It is a 16-bit register used to hold the address of the next instruction to be executed.
The main advantages of using segments are:
• Logical division of program, thus enhancing the overall possible memory use and minimize wastage.
• The addresses that need to be used, in programs are relocatable as they are the offsets. Thus, the segmentation supports relocatability.
• Although the size of address, is 20 bits, yet only the maximum segment size, that is 16 bits, needs to be kept in instruction, thus, reducing instruction length.
EU (Execution Unit)
Execution unit gives instructions to BIU stating from where to fetch the data and then decode and execute those instructions. Its function is to control operations on data using the instruction decoder & ALU. EU has no direct connection with system buses as shown in the above figure; it performs operations over data through BIU. Execution unit performs all the ALU operations. The execution unit of 8086 is of 16 bits. It also contains the control unit, which instructs bus interface unit about which memory location to access, and what to do with the data. Control unit also performs decoding and execution of the instructions. The EU consists of the following:
(a) Control Circuitry, Instruction Decoder and ALU
The 8086 control unit is primarily micro-programmed control. In addition it has an instruction decoder, which translates an instruction into sequence of micro operations. The ALU performs the required operations under the control of CU which issues the necessary timing and control sequences.
(b) Registers
All CPUs have a defined number of operational registers. 8086 has several general purpose and special purpose registers.
(c) Flag Register
It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the result stored in the accumulator. It has 9 flags and they are divided into 2 groups: Conditional Flags and Control Flags.

REGISTER SET OF 8086
The 8086 registers have five groups of registers. These groupings are done on the basis of the main functions of the registers. These groups are:
General purpose registers
8086 microprocessors have four general purpose registers namely, AX, BX, CX, DX. All these registers are 16 - bit registers. However, each register can be used as two general-purpose byte registers also. These byte registers are named AH and AL for AX, BH and BL for BX, CH and CL for CX, and DH and DL for DX. The H in register name represents higher byte while L represents lower byte of the 16 bits registers. These registers are primarily used for general computation purposes. However, in certain instruction executions they acquire a special meaning.
AX register − It is also known as accumulator register. It is used to store operands for arithmetic operations. Some of the instructions like divide, rotate, shift etc. require one of the operands to be available in the accumulator. Thus, in such Instructions, the value of AX should be suitably set prior to the instruction. It consists of two 8-bit registers AL and AH, which can be combined together and used as a 16-bit register AX. AL in this case contains the low-order byte of the word, and AH contains the high-order byte.
BX register − It is used as a base register. It is used to store the starting base address of the memory area within the data segment. It consists of 2 8-bit registers BL and BH, which can be combined together and used as a 16-bit register BX.
CX register − It is referred to as counter. It is used in loop instruction to store the loop counter. It is also used as counter in string manipulation and shift/rotate instructions. It also consists of 2 8-bit registers CL and CH, which can be combined together and used as a 16-bit register CX.
DX register − This register is used to hold I/O port address for I/O instruction. It also consists of 2 8-bit registers DL and DH, which can be combined together and used as a 16-bit register DX.
Segment Registers
Segment Registers are used for calculating the physical address of the instruction or memory. Segment registers cannot be used as byte registers.
Pointer and Index Registers
The 8086 microprocessor has three pointer and index registers. Each of these registers is of 16 bit and cannot be accessed byte wise. These are Base Pointer (BP), Source Index (Sl) and Destination Index (DI). Although they can be used as general purpose registers, their main objective is to contain indexes. BP is used in stack segment, SI in Data segment and DI in Extra Data segment.
Special Registers
Last in First Out (LIFO) stack is a data structure used for parameter passing, return address storage etc. 8086 stack is 64K bytes Base of the stack is pointed to by the stack segment (SS) register while the offset or top of the stack is stored in Stack Pointer (SP) register. Please note that although the memory in 8086 has byte addresses, stack is a word stack, which is any push operation, will occupy two bytes. It is a 16-bit register, which holds the address from the start of the segment to the memory location, where a word was most recently stored on the stack.
Flag Register
It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the result stored in the accumulator. A flag represents a condition code that is 0 or 1. Thus, it can be represented using a flip- flop. It has 9 flags and they are divided into 2 groups − Conditional Flags and Control Flags.
Conditional Flags
It represents the result of the last arithmetic or logical instruction executed. Conditional flags are set by some condition generated as a result of the last mathematical or logical instruction executed. Following is the list of conditional flags −
Carry flag (CF) − This flag indicates an overflow condition for arithmetic operations i.e. its value is 1 if there is a carry.
Auxiliary flag(AF) − When an operation is performed at ALU, it results in a carry/barrow from lower nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to D4 is AF flag. The processor uses this flag to perform binary to BCD conversion.
Parity flag(PF) − This flag is used to indicate the parity of the result, i.e. when the lower order 8-bits of the result contains even number of 1’s, then the Parity Flag is set. For odd number of 1’s, the Parity Flag is reset.
Zero flag(ZF) − This flag is set to 1 when the result of arithmetic or logical operation is zero else it is set to 0.
Sign flag(SF) − This flag holds the sign of the result, i.e. when the result of the operation is negative, then the sign flag is set to 1 else set to 0.
Overflow flag(OF) − This flag represents the result when the system capacity is exceeded.
Control Flags -Control flags controls the operations of the execution unit. which are set or reset deliberately to control the operations of the execution unit. Following is the list of control flags.
Trap flag (TF) − It is used for single step control and allows the user to execute one instruction at a time for debugging. If it is set, then the program can be run in a single step mode.
Interrupt flag (IF) − It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption of a program. It is set to 1 for interrupt enabled condition and set to 0 for interrupt disabled condition.
Direction flag (DF) − It is used in string operation. As the name suggests when it is set then string bytes are accessed from the higher memory address to the lower memory address and vice-a-versa.
Instruction Set Of 8086
The 8086 microprocessor supports 8 types of instructions:
o Data Transfer Instructions
o Arithmetic Instructions
o Bit Manipulation Instructions
o String Instructions
o Program Execution Transfer Instructions (Branch & Loop Instructions)
o Processor Control Instructions
o Iteration Control Instructions
o Interrupt Instructions
Data Transfer Instructions
These instructions are used to transfer the data from the source operand to the destination operand. Following are some of the instructions under this group:
MOV: Used to copy the byte or word from the provided source to the provided destination.
PPUSH: Used to put a word at the top of the stack.
POP: Used to get a word from the top of the stack to the provided location.
XCHG: Used to exchange the data from two locations.
IN: Used to read a byte or word from the provided port to the accumulator.
OUT: Used to send out a byte or word from the accumulator to the provided port.
Arithmetic Instructions
These instructions are used to perform arithmetic operations like addition, subtraction, multiplication, division, etc. Following are some of the instructions under this group:
ADD: Used to add the provided byte to byte/word to word.
ADC: Used to add with carry.
INC: Used to increment the provided byte/word by 1.
SUB: Used to subtract the byte from byte/word from word.
SBB: Used to perform subtraction with borrow.
DEC: Used to decrement the provided byte/word by 1.
MUL: Used to multiply unsigned byte by byte/word by word.
IMUL: Used to multiply signed byte by byte/word by word.
DIV: Used to divide the unsigned word by byte or unsigned double word by word.
IDIV: Used to divide the signed word by byte or signed double word by word.
Bit Manipulation Instructions
These instructions are used to perform operations where data bits are involved, i.e. operations like logical, shift, etc. Following are some of the instructions under this group:
NOT: Used to invert each bit of a byte or word.
AND: Used for adding each bit in a byte/word with the corresponding bit in another byte/word.
OR: Used to multiply each bit in a byte/word with the corresponding bit in another byte/word.
XOR: Used to perform Exclusive-OR operation over each bit in a byte/word with the corresponding bit in another byte/word.
SHL/SAL: Used to shift bits of a byte/word towards left and put zero(S) in LSBs.
SHR: Used to shift bits of a byte/word towards the right and put zero(S) in MSBs.
SAR: Used to shift bits of a byte/word towards the right and copy the old MSB into the new MSB.
ROL: Used to rotate bits of byte/word towards the left, i.e. MSB to LSB and to Carry Flag [CF].
ROR: Used to rotate bits of byte/word towards the right, i.e. LSB to MSB and to Carry Flag [CF].


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